fpga64 can someone test a demoscene demo?

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fpga64 can someone test a demoscene demo?

Postby ericgus » Mon Apr 18, 2016 12:47 am

I was wondering if someone can test a demo with their MiST/fpga64 code

"We Are Demo [2016]"
http://csdb.dk/release/?id=146723

I can not seem to get it to execute and didn't know if it was a bug or a compatiblity issue with the Mist .. just looking for a verifier to try it.

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Re: fpga64 can someone test a demoscene demo?

Postby goran » Mon Apr 18, 2016 8:29 am

I just tried on MIST (FW ATH160221, c64 core fpga64_c1541_160110.rbf). Nothing happens after RUN.

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Re: fpga64 can someone test a demoscene demo?

Postby xc8 » Sun Apr 24, 2016 12:17 pm

It's just the 1541 part of the core that does not support 'full 1541' emulation, I tested the demo on c-1 , running the original fpga64 core, in my case the c-1 has an sd2iec - not full 1541 emulation, too, a lot of custom/fastloaders are not working. You will see the same results on VICE, if you uncheck the 'true drive emulation'.

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Re: fpga64 can someone test a demoscene demo?

Postby MasterOfGizmo » Tue Apr 26, 2016 12:10 pm

The c1541 implementation of the MIST actually implements the hardware of a 1541 and even includes the orgiginal 1541 roms. But the "drive hardware" itself isn't implement to much detail. So i suspect it's missing something from the underlying drive hardware.
MIST board, FPGA based Atari STE and more: https://github.com/mist-devel/mist-board/wiki

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Re: fpga64 can someone test a demoscene demo?

Postby Sorgelig » Thu May 12, 2016 4:41 am

Actually, SID - is the most important part of C64 core. And it's pretty crappy. I've tried to improve it, but i'm lack of SID experience and don't know every bit of it. And so far, no one is working on FPGA SID improvements.
So, for me this core is simply doesn't exist. Don't want to frustrate from sound every time i use it. So, it's better to forget it till better time...

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Re: fpga64 can someone test a demoscene demo?

Postby xc8 » Fri May 13, 2016 2:44 pm

forget 100% emulation of SID, as SID is a combo of analogue-digital circuits.

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Re: fpga64 can someone test a demoscene demo?

Postby vebxenon » Fri May 13, 2016 10:53 pm

xc8 wrote:forget 100% emulation of SID, as SID is a combo of analogue-digital circuits.


Yeah. You're right. And actually C=64 core doesn't sound bad...

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Re: fpga64 can someone test a demoscene demo?

Postby Newsdee » Fri May 13, 2016 11:23 pm

The TC64 has very good SID implementation (both versions) unfortunately the core isnt open source...

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Re: fpga64 can someone test a demoscene demo?

Postby Sorgelig » Sat May 14, 2016 3:22 am

xc8 wrote:forget 100% emulation of SID, as SID is a combo of analogue-digital circuits.

The problem is in digital emulation.
Check intro of Turrican II. You won't hear percussion for example. In title song a lot of strange vibrations.
Analogue part isn't so important and can be workarounded if digital part is correct.

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Re: fpga64 can someone test a demoscene demo?

Postby ericgus » Wed May 18, 2016 7:30 am

Pitty someone cant drop Jeri Ellsworth an email and ask her about SID in FPGA.. I'd say she is the definitive queen of c64 in FPGA. .. but she is busy with CastAR these days.

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Re: fpga64 can someone test a demoscene demo?

Postby xc8 » Thu May 19, 2016 11:32 am

ericgus wrote:Pitty someone cant drop Jeri Ellsworth an email and ask her about SID in FPGA.. I'd say she is the definitive queen of c64 in FPGA. .. but she is busy with CastAR these days.


what FPGA? the first one (on c-one) was half-backed and definitely not contained SID emulation (SID socket on the machine), the second one (DTV) is ASIC (and closed source AFAIK)

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Re: fpga64 can someone test a demoscene demo?

Postby ericgus » Sun May 22, 2016 5:45 am

xc8 wrote:
ericgus wrote:Pitty someone cant drop Jeri Ellsworth an email and ask her about SID in FPGA.. I'd say she is the definitive queen of c64 in FPGA. .. but she is busy with CastAR these days.


what FPGA? the first one (on c-one) was half-backed and definitely not contained SID emulation (SID socket on the machine), the second one (DTV) is ASIC (and closed source AFAIK)



Well she did do the C64DTV which had sid emulation in it.. and it was initially done based on the CONE work she did. the "DTV" was based on the fpga work .. just burned into an ASIC after the fact.. so again.. I think she would be a qualified person to ask on the topic. (I didnt say she would share the code)

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Re: fpga64 can someone test a demoscene demo?

Postby Newsdee » Sun May 22, 2016 6:17 am

There is already a more advanced device than the C64DTV called the Turbo Chameleon 64 by Jens Schonfeld. I believe the MIST's c64 core is based off an older version of the TC64 core (which was open-source or at least gray area but available). The latest version of the TC64 isn't open but it has a very good SID implementation.

Perhaps now that the TC64 are out of stock they might consider opening the code, unless they're planning another run of it.

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Re: fpga64 can someone test a demoscene demo?

Postby ericgus » Mon May 23, 2016 2:21 am

I would just love some things like fastloader support (or even .CRT support ), .d64 write support and -- this is wishful thinking -- support of the MIST's hardware serial I/O port (the one the midi adaptor uses) for use with the c64 core.. would be nice to be able to connect it (say via a raspberry pi running tcpser) to do old school BBS'ing again..

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Re: fpga64 can someone test a demoscene demo?

Postby xc8 » Mon May 23, 2016 5:03 pm

Newsdee wrote:There is already a more advanced device than the C64DTV called the Turbo Chameleon 64 by Jens Schonfeld. I believe the MIST's c64 core is based off an older version of the TC64 core (which was open-source or at least gray area but available). The latest version of the TC64 isn't open but it has a very good SID implementation.

Perhaps now that the TC64 are out of stock they might consider opening the code, unless they're planning another run of it.


MiSTs core is based on fpga64 v27 (latest source available by Peter Wendrich) , there is a newer one -v29-, c-one only, there is not source code for this, but I think Peter can sell the code. I am using the TC64 core on the c-one, just for few games as the fpga64 has some freakin bugs (like the restore key is not working).

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Re: fpga64 can someone test a demoscene demo?

Postby Sorgelig » Tue May 24, 2016 2:25 pm

There is source code of 1541 Ultimate II on github with SID sources.
I didn't try to port that SID yet, although it's written that source cannot be used in other projects without explicit permission.
The code of SID is pretty large and may be has good emulation. VHDL is the biggest problem. Everything about C64 and SID is written in this ugly inconvenient language...
Is there any 1541UltimateII user around? Would be good to know about quality of SID before do anything.

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Re: fpga64 can someone test a demoscene demo?

Postby javidoom » Tue May 24, 2016 3:08 pm

Hi.

Seems this core need some extra love :)

Mambrino tried too, to improve the 1541 disk drive compatibility (https://github.com/mist-devel/mist-binaries/issues/22)

I have one 1541UII, and right now, running :) But I didn't know it emulate the SID... as I've always used it as a disk drive...

I've searching into the menus, and find something SID related, but I really don't know how to use it, as it acts as a cart and sound is through the C64... :?

I'm updating the firmware... maybe there is something new I didn't know.

Regards.

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Re: fpga64 can someone test a demoscene demo?

Postby Sorgelig » Tue May 24, 2016 3:14 pm

check this video:
https://www.youtube.com/watch?v=dwL4Tx5oTok

There is options in menu to configure real/virtual SID. As i understood, FPGA has its own audio output from virtual SID.

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Re: fpga64 can someone test a demoscene demo?

Postby javidoom » Tue May 24, 2016 3:35 pm

Gotcha!

I've made a video with a comparison between the real SID, and the 1541UII.

Uploading it to youtube.... Uploaded, here you have the link:

https://youtu.be/M3_WaK6lrYA

As you can hear, the emulated is very very accurate :) Even sounds better! But due to the JBL Speakers.... ehhe... But you can get a good idea how it sounds.

Regards.

Edit: Using the internal SID player, sound exactly as the video :) Very accurate.

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Re: fpga64 can someone test a demoscene demo?

Postby Sorgelig » Tue May 24, 2016 3:45 pm

looks promising :)

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Re: fpga64 can someone test a demoscene demo?

Postby mambrino » Tue May 24, 2016 4:05 pm

xc8 wrote:MiSTs core is based on fpga64 v27 (latest source available by Peter Wendrich) , there is a newer one -v29-, c-one only, there is not source code for this, but I think Peter can sell the code. I am using the TC64 core on the c-one, just for few games as the fpga64 has some freakin bugs (like the restore key is not working).


This will be great, but as Peter said, v27+ versions include code fragments from Turbo Chameleon 64 project and this is why source code can't be published. In addition, the code has to been patched for MiST as was done with version 27.

Anyway, it's possible to improve the actual version with a better SID (as proposed by Sorgelig) and 1541 simulation without using the original project code.

javidoom wrote:Mambrino tried too, to improve the 1541 disk drive compatibility (https://github.com/mist-devel/mist-binaries/issues/22)


I tried...but my knowlege of C64 architecture right now only allowed me to compile the core, apply the patches for MiST and test C1541 behaviour with straight C64-C1541 load & speedloaders support. After testing I got data errors in accelerated data block transfers and Till Harbaum said that this part needs to be reworked to improve C1541 funcionality.

Maybe someone else can rewrite this part.

sorgelig wrote:There is source code of 1541 Ultimate II on github with SID sources.
I didn't try to port that SID yet, although it's written that source cannot be used in other projects without explicit permission.
The code of SID is pretty large and may be has good emulation. VHDL is the biggest problem. Everything about C64 and SID is written in this ugly inconvenient language...
Is there any 1541UltimateII user around? Would be good to know about quality of SID before do anything.


If you can work in SID simulation, and (if possible) in C1541 compatibility, will be a very great improvement for this core.

Thanks ;)
Last edited by mambrino on Tue May 24, 2016 5:48 pm, edited 2 times in total.

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Re: fpga64 can someone test a demoscene demo?

Postby Sorgelig » Tue May 24, 2016 5:06 pm

The problem is in VHDL. I simply hate this language. Ugly cluttered language...
I can try to add SID from 1541uII, but that's all. My knowledge in C64 arch is very limited.

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Re: fpga64 can someone test a demoscene demo?

Postby Sorgelig » Tue May 24, 2016 5:24 pm

hmm.. not enough FPGA memory :(
Too many ROMs and buffers already used in this core. Need 2KB for SID filter.

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Re: fpga64 can someone test a demoscene demo?

Postby Sorgelig » Tue May 24, 2016 8:06 pm

Wow! I hear good old SID ;)
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Re: fpga64 can someone test a demoscene demo?

Postby ericgus » Tue May 24, 2016 8:50 pm

many of 1541 Ultimate II features would be amazing to add to the c64 core but id just be happy with 1541 improvements (ie. write) and support for a speedup cart like fastload or ability to load a .crt (with a fastloader) ..

Will have to try sorgelig's sid rbf when I get a chance. :-) .. thanks for trying to improve the c64 core !


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